Code
Constraints
Board Info
Sensor
irrigation_system.vVerilog HDL
constraints.ucfUCF Pin Map
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🔲 FPGA Device
FamilySpartan-6
DeviceXC6SLX9
PackageTQG144
Speed Grade-3
Logic Cells9,152
Flip-Flops11,440
I/O Pins102 (user)
Clock100 MHz
ToolXilinx ISE 14.7
BitstreamNot generated
📌 Pin Assignments
clk
LOC: V10
100 MHz Osc
rst
LOC: C9
Push Button
soil
LOC: T10
Sensor AO
pump
LOC: U16
Relay Drive
led_green
LOC: U18
LD0 Pump ON
led_red
LOC: M14
LD1 Pump OFF
📊 Resource Utilization
Slice LUTs12 / 5765 (0%)
Flip-Flops28 / 11440 (0%)
IOBs6 / 102 (6%)
TimingMET — 98.4 MHz
StatusNot programmed
Soil Moisture Sensor
Moisture Level50%
0 — Dry100 — Wet
Auto-cycle test
FPGA Threshold
Dry/Wet boundary50
soil_s: 1'b0 (DRY)
Component Map
Q1 NPN BC547 Transistor
R1,R2,R3 220Ω Resistors
M1 DC Motor (Water Pump)
D1 Green LED — Pump ON
D2 Red LED — Pump OFF
R1,R2,R3 220Ω Resistors
M1 DC Motor (Water Pump)
D1 Green LED — Pump ON
D2 Red LED — Pump OFF
◈ Output
Waveformt=0
soil
1'b1
pump
1'b0
led_green
1'b0
led_red
1'b1
▸ Console
[0ns]Spartan-6 simulator ready.
[--]Program FPGA then Run.